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超大規模集成電路CADII-設計

集成電路 共34課時 9小時41分41秒
簡介

A modern VLSI chip is a remarkably complex beast:? billions of transistors, millions of logic gates deployed for computation and control, big blocks of memory, embedded blocks of pre-designed functions designed by third parties (called “intellectual property” or IP blocks).? How do people manage to design these complicated chips?? Answer:? a sequence of computer aided design (CAD) tools takes an abstract description of the chip, and refines it step-wise to a final design. This class focuses on the major design tools used in the creation of an Application Specific Integrated Circuit (ASIC) or System on Chip (SoC) design.? Our focus in this part of the course is on the key logical and geometric representations that make it possible to map from logic to layout, and in particular, to place, route, and evaluate the timing of large logic networks. Our goal is for students to understand how the tools themselves work, at the level of their fundamental algorithms and data structures. Topics covered will include: technology mapping, timing analysis, and ASIC placement and routing.

Recommended Background:

Programming experience (C, C++, Java, Python, etc.) and basic knowledge of data structures and algorithms (especially recursive algorithms).? An understanding of basic digital design:? Boolean algebra, Kmaps, gates and flip flops, finite state machine design.? Linear algebra and calculus at the level of a junior or senior in engineering.? Elementary knowledge of RC linear circuits (at the level of an introductory physics class).

人們如何設計這些復雜的芯片?答:一系列計算機輔助設計(CAD)工具對芯片進行抽象描述,并逐步細化到最終設計。本課程主要介紹在建立特定應用集成電路(ASIC)或系統芯片(SoC)設計時所使用的主要設計工具。

課程目錄
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